1. Field
This invention relates to a phase-locked loop (PLL), and more specifically, to generating multiple local oscillation (LO) frequencies using a single PLL to lock multiple voltage-controlled oscillators (VCOs).
2. Background
In transceiver circuits that support carrier aggregation, multiple receiver and transmitter synthesizers are needed, one for each local oscillator frequency. For example, for three downlink and two uplink carrier aggregation, five synthesizers are needed. This configuration requires large amount of silicon area from each phase locked loop (PLL).